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Silicon Labs /EFR32MG22C224F512IM32 /GPCRC_S /EN

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Interpret as EN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLE)EN

EN=DISABLE

Description

No Description

Fields

EN

CRC Enable

0 (DISABLE): Disable CRC function. Reordering functions are still available. Only BITREVERSE and BYTEREVERSE bits are configurable in this mode.

1 (ENABLE): Writes to INPUTDATA registers will result in CRC operations.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data